To increase the density of devices using integrated circuit chips it is desirable to allow interconnections to be made to both the top and bottom surfaces of the integrated circuit chip. This requires formation of through wafer vias from the top to the bottom surface of the integrated chip that are compatible with carrying both high frequency and DC signals. Many existing through via schemes are difficult to integrate into existing integrated circuit fabrication processes. Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.